Modeling Nanowire and Double-Gate Junctionless Field-Effect Transistors
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Modeling Nanowire and Double-Gate Junctionless Field-Effect Transistors
Sallese, Jean-Michel; Jazaeri, Farzan
Cambridge University Press
03/2018
252
Dura
Inglês
9781107162044
15 a 20 dias
640
Descrição não disponível.
1. Introduction; 2. Review on modeling junctionless FETs; 3. The EPFL charge-based model of junctionless field-effect transistors; 4. Model driven design - space of junctionless FETs; 5. Generalization of the charge based model: accounting for inversion layers; 6. Predicted performances of junctionless FETs; 7. Short channel effects in symmetric junctionless double-gate FETs; 8. Modeling AC operation in symmetric double-gate and nanowire JL FETs; 9. Modeling asymmetric operation of double-gate junctionless FETs; 10. Modeling noise behavior in junctionless FETs; 11. Carrier mobility extraction methodology in JL and inversion mode FETs; 12. Revisiting the Junction FET: a junctionless FET with an ? gate capacitance; 13. Modeling junctionless FET with interface traps targeting biosensor applications; Appendix A. Design - space of twin gate junctionless vertical slit FETs; Appendix B. Transient off-current in junctionless FETs; Appendix C. Derivatives of mobile charge density with respect to VGS and VDS; Appendix D. Global charge density at drain in depletion mode; Appendix E. Global charge density at drain in accumulation mode; Appendix F. The EPFL Junctionless MODEL ver.1.0.
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1. Introduction; 2. Review on modeling junctionless FETs; 3. The EPFL charge-based model of junctionless field-effect transistors; 4. Model driven design - space of junctionless FETs; 5. Generalization of the charge based model: accounting for inversion layers; 6. Predicted performances of junctionless FETs; 7. Short channel effects in symmetric junctionless double-gate FETs; 8. Modeling AC operation in symmetric double-gate and nanowire JL FETs; 9. Modeling asymmetric operation of double-gate junctionless FETs; 10. Modeling noise behavior in junctionless FETs; 11. Carrier mobility extraction methodology in JL and inversion mode FETs; 12. Revisiting the Junction FET: a junctionless FET with an ? gate capacitance; 13. Modeling junctionless FET with interface traps targeting biosensor applications; Appendix A. Design - space of twin gate junctionless vertical slit FETs; Appendix B. Transient off-current in junctionless FETs; Appendix C. Derivatives of mobile charge density with respect to VGS and VDS; Appendix D. Global charge density at drain in depletion mode; Appendix E. Global charge density at drain in accumulation mode; Appendix F. The EPFL Junctionless MODEL ver.1.0.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
