Digital Design Using VHDL
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Digital Design Using VHDL
A Systems Approach
Harting, R. Curtis; Aamodt, Tor M.; Dally, William J.
Cambridge University Press
12/2015
721
Dura
Inglês
9781107098862
15 a 20 dias
1610
Descrição não disponível.
Part I. Introduction: 1. The digital abstraction; 2. The practice of digital system design; Part II. Combinational Logic: 3. Boolean algebra; 4. CMOS logic circuits; 5. Delay and power of CMOS circuits; 6. Combinational logic design; 7. VHDL descriptions of combinational logic; 8. Combinational building blocks; 9. Combinational examples; Part III. Arithmetic Circuits: 10. Arithmetic circuits; 11. Fixed- and floating-point numbers; 12. Fast arithmetic circuits; 13. Arithmetic examples; Part IV. Synchronous Sequential Logic: 14. Sequential logic; 15. Timing constraints; 16. Datapath sequential logic; 17. Factoring finite-state machines; 18. Microcode; 19. Sequential examples; Part V. Practical Design: 20. Verification and test; Part VI. System Design: 21. System-level design; 22. Interface and system-level timing; 23. Pipelines; 24. Interconnect; 25. Memory systems; Part VII. Asynchronous Logic: 26. Asynchronous sequential circuits; 27. Flip-flops; 28. Metastability and synchronization failure; 29. Synchronizer design; Appendix A. VHDL coding style; Appendix B. VHDL syntax guide; References; Index.
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Part I. Introduction: 1. The digital abstraction; 2. The practice of digital system design; Part II. Combinational Logic: 3. Boolean algebra; 4. CMOS logic circuits; 5. Delay and power of CMOS circuits; 6. Combinational logic design; 7. VHDL descriptions of combinational logic; 8. Combinational building blocks; 9. Combinational examples; Part III. Arithmetic Circuits: 10. Arithmetic circuits; 11. Fixed- and floating-point numbers; 12. Fast arithmetic circuits; 13. Arithmetic examples; Part IV. Synchronous Sequential Logic: 14. Sequential logic; 15. Timing constraints; 16. Datapath sequential logic; 17. Factoring finite-state machines; 18. Microcode; 19. Sequential examples; Part V. Practical Design: 20. Verification and test; Part VI. System Design: 21. System-level design; 22. Interface and system-level timing; 23. Pipelines; 24. Interconnect; 25. Memory systems; Part VII. Asynchronous Logic: 26. Asynchronous sequential circuits; 27. Flip-flops; 28. Metastability and synchronization failure; 29. Synchronizer design; Appendix A. VHDL coding style; Appendix B. VHDL syntax guide; References; Index.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
